Thermal-Cycling-Induced Si3N4 Damage in Semiconductor Devices Assembled Utilizing a Lead-on-Chip Package

This article shows how fractures in the Si3N4 layer, which comprises top layer of semiconductor devices encapsulated utilizing a lead-on-chip (LOC) packaging technique, are influenced by changes lead-frame materials and thermal-cycling test conditions. Using tests, it was found that Si 3 N 4 most sensitive to at early stage thermal-cycling, between -65sup>oC 150sup>oC. Through SEM examinations stress simulations, this work adopting copper with CTE-value similar package body effectively prevents filler-driven damage, providing better reliability margins during thermal-cycling.